[llvm-dev] Simplifying and matching sign-extended expressions

Previous Topic Next Topic
 
classic Classic list List threaded Threaded
1 message Options
Reply | Threaded
Open this post in threaded view
|

[llvm-dev] Simplifying and matching sign-extended expressions

Robin Eklind via llvm-dev

Hi,

 

I am currently trying to analyze instructions in a loop, in the mid-end to determine if they are using a specific operand (another instruction). The problem is that the instruction being looked at may be wrapped by another instruction such as a sign-extend.

 

For example:

 

%19 = load i64, i64* %LOOPN28, align 8, !tbaa !25

%conv267 = and i64 %19, 65535 //taking lower 16 bits

 

%24 = trunc i64 %19 to i32

%conv38 = and i32 %24, 65535

%sub277 = add nsw i32 %conv38, -1

 

Suppose I am currently analyzing %sub277’s operand, %conv38.

 

Is there a way to simplify expressions such that it would be easier to determine that %conv38 and %conv267 both are ‘coming’ from %19 but just truncated / sign extended?

 

I have looked into the PatternMatch API, but it seems like the limitations of it would still result in having to know the sequence of sign-extension/truncation operations before hand.

 

I have also looked into potentially using ScalarEvolution to get the SCEV and traverse the subexpressions, but again that would rely on knowing the possible list of patterns before hand.

 

Is there a more generic approach to tackling this problem?

 

Thanks.

 

Regards,

Wilson

 


_______________________________________________
LLVM Developers mailing list
[hidden email]
http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev