[llvm-dev] RFC: [SLP] Vectorize bit-parallel operations using general purpose registers.

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[llvm-dev] RFC: [SLP] Vectorize bit-parallel operations using general purpose registers.

Robin Eklind via llvm-dev
Hi,

I'd like to get people's opinions about a small change extending SLP to handle vectorization of some instructions using general purpose registers.

A description of the issue and a proof of concept can be found here: https://reviews.llvm.org/D48725

Thanks !

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