ARM supports conditional execution; the predicate operands are used to represent that. This is represented with two operands; the predicate code (“al”, “eq”, “ne”, etc.), and the register that controls predication (%noreg if it’s not predicated,
$cpsr if it is).
From: llvm-dev <[hidden email]> On Behalf Of
Jie Zhou via llvm-dev Sent: Wednesday, March 20, 2019 5:53 PM To: via llvm-dev <[hidden email]> Subject: [EXT] [llvm-dev] How to build an ARM Thumb2 ADD with shift immediate Machine Instruction
I’m trying to build an "ADD with shift immediate" machine instruction (ADD(register) Encoding T3; item A7.7.4 of the ARMv7-M manual) in an ARM machine function pass. Here is my code