Instruction sets requiring more than 3 operands

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Instruction sets requiring more than 3 operands

Seung Jae Lee
Hello.
I am making a LLVM backend for a new architecture XCC. During implementation of instructions for XCC, I found that there are instructions need more than 3 operands in the target language manual. I could implement insructions need 1, 2 or 3 operands thanks to the examples in the LLVM backends already offered by you guys.
But, I am not sure about those kind of instructions needs many number of operands that is not fixed. That is, it can be 4, 5, 6 ... which changes according to the program.
Would you mind letting me know about this?
Thank you.

Seung Jae Lee
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Re: Instruction sets requiring more than 3 operands

Evan Cheng-2
Sounds like you need to define variable_ops instructions. Take a look  
at CALLpcrel32 in X86InstrInfo.td as an example. Just do a grab for  
variable_ops. There are a number of such instructions in various  
backends.

Evan
On Dec 14, 2006, at 11:58 AM, Seung Jae Lee wrote:

> Hello.
> I am making a LLVM backend for a new architecture XCC. During  
> implementation of instructions for XCC, I found that there are  
> instructions need more than 3 operands in the target language  
> manual. I could implement insructions need 1, 2 or 3 operands  
> thanks to the examples in the LLVM backends already offered by you  
> guys.
> But, I am not sure about those kind of instructions needs many  
> number of operands that is not fixed. That is, it can be 4, 5,  
> 6 ... which changes according to the program.
> Would you mind letting me know about this?
> Thank you.
>
> Seung Jae Lee
> _______________________________________________
> LLVM Developers mailing list
> [hidden email]         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

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Re: Instruction sets requiring more than 3 operands

Seung Jae Lee
In reply to this post by Seung Jae Lee
Dear Mr. Cheng:

Thank you for kind information.
Can you tell me in more detail about that?
For example, I am trying to implement 'demultiplex' instruction as follows:

demultiplex <multiplexid,choose,branch0id,branch1id,…,otherwisebranchid>

In this case, the number of branch#id is not definite. It can be 1, 2, 3...or any number.

My question was about this. I am still not sure how to use CALLpcrel32 you mentioned for this.
Thank you very much.

Seung Jae Lee

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Re: Instruction sets requiring more than 3 operands

Evan Cheng-2
You have to provide more information than that. Let's say your target  
is called FOO, and assuming multiplexid is an i32 immediate. You want  
to define something like this:

def DEMULTIPLEX : I<(ops i32imm:$id, variable_ops),
                                          "demultiplex $id",  
[(FOOMutex imm:$id)]>;

The auto-generated instruction selection function will check that  
operand 0 is a 32-bit immediate and suck up all the other operands  
(if any) trailing it to form a target specific node with 1 or more  
operands. It will evetually be translated into a MachineInstr* with 1  
or more operands.

If the assembly you are generating will actually print out the  
additional operands. You need to define a custom operand with its own  
asm printing method. e.g.

def demux_ops : Operand<i32> {
   let PrintMethod  = "printDemuxOps";
}

Add this method to the target's asm printer class. The method is  
passed a MachineInstr* and OpNum. That allows you to know just  
exactly how many operands there are and etc.

Hope this is enough information.

Evan

On Dec 19, 2006, at 9:59 PM, Seung Jae Lee wrote:

> Dear Mr. Cheng:
>
> Thank you for kind information.
> Can you tell me in more detail about that?
> For example, I am trying to implement 'demultiplex' instruction as  
> follows:
>
> demultiplex <multiplexid,choose,branch0id,branch1id,
> …,otherwisebranchid>
>
> In this case, the number of branch#id is not definite. It can be 1,  
> 2, 3...or any number.
>
> My question was about this. I am still not sure how to use  
> CALLpcrel32 you mentioned for this.
> Thank you very much.
>
> Seung Jae Lee
>
> _______________________________________________
> LLVM Developers mailing list
> [hidden email]         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev


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