Improving i128 division on x86_64

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Improving i128 division on x86_64

Paweł Bylica
Hi LLVM,

I think the potential of divq instruction is not fully exploited by X86 target.

The following IR can be lowered to one divq instruction:
define i64 @div128by64lo(i128 %d, i64 %n) nounwind readnone {
  %m = zext i64 %n to i128
  %q = udiv i128 %d, %m
  %q.l = trunc i128 %q to i64
  ret i64 %q.l
}

And that one can be 2 divq instructions:
define i128 @div128by64full(i128 %d, i64 %n) nounwind readnone {
  %m = zext i64 %n to i128
  %q = udiv i128 %d, %m
  ret i128 %q
}

In current implementation, everywhere where i128 type shows up codegen generates a call to  __udivti3 builtin function.

Am I missing something?
- Paweł

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Re: Improving i128 division on x86_64

Paweł Bylica
On Thu, May 14, 2015 at 12:17 PM Paweł Bylica <[hidden email]> wrote:
Hi LLVM,

I think the potential of divq instruction is not fully exploited by X86 target.

The following IR can be lowered to one divq instruction:
define i64 @div128by64lo(i128 %d, i64 %n) nounwind readnone {
  %m = zext i64 %n to i128
  %q = udiv i128 %d, %m
  %q.l = trunc i128 %q to i64
  ret i64 %q.l
}

And that one can be 2 divq instructions:
define i128 @div128by64full(i128 %d, i64 %n) nounwind readnone {
  %m = zext i64 %n to i128
  %q = udiv i128 %d, %m
  ret i128 %q
}

In current implementation, everywhere where i128 type shows up codegen generates a call to  __udivti3 builtin function.

Am I missing something?
- Paweł

I also found a GCC bug report about that:

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