ARM backend problem ?

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ARM backend problem ?

Peltier, Mikael

Hello,

 

I want to compile a LLVM file into an executable running on ARM platform.

I use LLVM 2.0 with the following command lines:

llvm-as -f –o test.bc test.ll

llc –march=arm –mcpu=arm1136j-s –mattr=+v6 –f –o test.s test.bc

arm-linux-gnu-as –mcpu=arm1136j-s  test.s

 

With the last command, I obtain the following error:

rd and rm should be different in mul

 

The bad instruction is “mul r3, r3, r2” that follows the syntax “mul rd, rm, rs”.

 

I want to know where is my mistake or if it is a bug in register allocator ?

 

Thanks in advance.

 

Mikaël.

 

 

 

target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"

@.str1 = internal constant [4 x i8] c"%d\0A\00"               

 

declare i32 @printf(i8*, ...)

 

define i32 @main (){

entry:

  %n = alloca i32

  %f = alloca i32

  %i = alloca i32

  %zero = alloca i32

  %inc = alloca i32

  store i32 5, i32* %n

  store i32 1, i32* %f

  store i32 1, i32* %i

  store i32 0 , i32* %zero

  store i32 1 , i32* %inc

 

  %tmp7 = load i32* %n 

  %tmp8 = load i32* %zero

  %tmp6 = icmp sgt i32 %tmp7, %tmp8

  br i1 %tmp6, label %then4, label %else12

 

then4:

  %tmp14 = load i32* %i

  %tmp16 = load i32* %n

  %tmp18 = load i32* %inc

  %tmp15 = add i32 %tmp16, %tmp18

  %tmp13 = icmp slt i32 %tmp14, %tmp15

  br i1 %tmp13, label %then11, label %else12

 

then11:

  %tmp20 = load i32* %f

  %tmp22 = alloca i32

  store i32 1 , i32* %tmp22

  %tmp23 = load i32* %tmp22

  %tmp24 = load i32* %i

  %tmp21 = add i32 %tmp24, %tmp23

  store i32 %tmp21, i32* %i

  %tmp19 = mul i32 %tmp20, %tmp21                

  store i32 %tmp19, i32* %f

  br label %then4

 

else12:

  %tmp25 = load i32* %f

  %tmp335 = getelementptr [4 x i8]* @.str1, i32 0, i32 0               

  %tmp336 = call i32 (i8*, ...)* @printf( i8* %tmp335, i32 %tmp25 )           

   ret i32 %tmp25

}

 


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Re: ARM backend problem ?

Lauro Ramos Venancio
Hi Mikael,

You are obtaining warning, not an error, right? The most arm cores,
including arm1136, can execute mul with rd = rm. So, you can ignore
this warning.

Lauro

2007/6/12, Peltier, Mikael <[hidden email]>:

>
>
>
>
> Hello,
>
>
>
> I want to compile a LLVM file into an executable running on ARM platform.
>
> I use LLVM 2.0 with the following command lines:
>
> llvm-as -f –o test.bc test.ll
>
> llc –march=arm –mcpu=arm1136j-s –mattr=+v6 –f –o test.s test.bc
>
> arm-linux-gnu-as –mcpu=arm1136j-s  test.s
>
>
>
> With the last command, I obtain the following error:
>
> rd and rm should be different in mul
>
>
>
> The bad instruction is "mul r3, r3, r2" that follows the syntax "mul rd, rm,
> rs".
>
>
>
> I want to know where is my mistake or if it is a bug in register allocator ?
>
>
>
> Thanks in advance.
>
>
>
> Mikaël.
>
>
>
>
>
>
>
> target datalayout =
> "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
>
> @.str1 = internal constant [4 x i8] c"%d\0A\00"
>
>
>
> declare i32 @printf(i8*, ...)
>
>
>
> define i32 @main (){
>
> entry:
>
>   %n = alloca i32
>
>   %f = alloca i32
>
>   %i = alloca i32
>
>   %zero = alloca i32
>
>   %inc = alloca i32
>
>   store i32 5, i32* %n
>
>   store i32 1, i32* %f
>
>   store i32 1, i32* %i
>
>   store i32 0 , i32* %zero
>
>   store i32 1 , i32* %inc
>
>
>
>   %tmp7 = load i32* %n
>
>   %tmp8 = load i32* %zero
>
>   %tmp6 = icmp sgt i32 %tmp7, %tmp8
>
>   br i1 %tmp6, label %then4, label %else12
>
>
>
> then4:
>
>   %tmp14 = load i32* %i
>
>   %tmp16 = load i32* %n
>
>   %tmp18 = load i32* %inc
>
>   %tmp15 = add i32 %tmp16, %tmp18
>
>   %tmp13 = icmp slt i32 %tmp14, %tmp15
>
>   br i1 %tmp13, label %then11, label %else12
>
>
>
> then11:
>
>   %tmp20 = load i32* %f
>
>   %tmp22 = alloca i32
>
>   store i32 1 , i32* %tmp22
>
>   %tmp23 = load i32* %tmp22
>
>   %tmp24 = load i32* %i
>
>   %tmp21 = add i32 %tmp24, %tmp23
>
>   store i32 %tmp21, i32* %i
>
>   %tmp19 = mul i32 %tmp20, %tmp21
>
>   store i32 %tmp19, i32* %f
>
>   br label %then4
>
>
>
> else12:
>
>   %tmp25 = load i32* %f
>
>   %tmp335 = getelementptr [4 x i8]* @.str1, i32 0, i32 0
>
>   %tmp336 = call i32 (i8*, ...)* @printf( i8* %tmp335, i32 %tmp25 )
>
>
>    ret i32 %tmp25
>
> }
>
>
> _______________________________________________
> LLVM Developers mailing list
> [hidden email]         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>

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Re: ARM backend problem ?

Dale Johannesen
In reply to this post by Peltier, Mikael

On Jun 12, 2007, at 4:55 AM, Peltier, Mikael wrote:
I use LLVM 2.0 with the following command lines:

llvm-as -f –o test.bc test.ll

llc –march=arm –mcpu=arm1136j-s –mattr=+v6 –f –o test.s test.bc

arm-linux-gnu-as –mcpu=arm1136j-s  test.s

 With the last command, I obtain the following error:

rd and rm should be different in mul

The bad instruction is “mul r3, r3, r2” that follows the syntax “mul rd, rm, rs”. 

I want to know where is my mistake or if it is a bug in register allocator ?

This instruction is valid on 1136j-s and other ARMv6 implementations.
Since you have told the assembler that's what you have, it should
not warn; this is an assembler bug.  It is safe to ignore the message.


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Re: ARM backend problem ?

Peltier, Mikael
In reply to this post by Lauro Ramos Venancio
you are right, I will ignore this warning.

Thanks,

Mikaël

-----Original Message-----
From: Lauro Ramos Venancio [mailto:[hidden email]]
Sent: mardi 12 juin 2007 16:19
To: LLVM Developers Mailing List; Peltier, Mikael
Subject: Re: [LLVMdev] ARM backend problem ?

Hi Mikael,

You are obtaining warning, not an error, right? The most arm cores,
including arm1136, can execute mul with rd = rm. So, you can ignore
this warning.

Lauro

2007/6/12, Peltier, Mikael <[hidden email]>:

>
>
>
>
> Hello,
>
>
>
> I want to compile a LLVM file into an executable running on ARM platform.
>
> I use LLVM 2.0 with the following command lines:
>
> llvm-as -f -o test.bc test.ll
>
> llc -march=arm -mcpu=arm1136j-s -mattr=+v6 -f -o test.s test.bc
>
> arm-linux-gnu-as -mcpu=arm1136j-s  test.s
>
>
>
> With the last command, I obtain the following error:
>
> rd and rm should be different in mul
>
>
>
> The bad instruction is "mul r3, r3, r2" that follows the syntax "mul rd, rm,
> rs".
>
>
>
> I want to know where is my mistake or if it is a bug in register allocator ?
>
>
>
> Thanks in advance.
>
>
>
> Mikaël.
>
>
>
>
>
>
>
> target datalayout =
> "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
>
> @.str1 = internal constant [4 x i8] c"%d\0A\00"
>
>
>
> declare i32 @printf(i8*, ...)
>
>
>
> define i32 @main (){
>
> entry:
>
>   %n = alloca i32
>
>   %f = alloca i32
>
>   %i = alloca i32
>
>   %zero = alloca i32
>
>   %inc = alloca i32
>
>   store i32 5, i32* %n
>
>   store i32 1, i32* %f
>
>   store i32 1, i32* %i
>
>   store i32 0 , i32* %zero
>
>   store i32 1 , i32* %inc
>
>
>
>   %tmp7 = load i32* %n
>
>   %tmp8 = load i32* %zero
>
>   %tmp6 = icmp sgt i32 %tmp7, %tmp8
>
>   br i1 %tmp6, label %then4, label %else12
>
>
>
> then4:
>
>   %tmp14 = load i32* %i
>
>   %tmp16 = load i32* %n
>
>   %tmp18 = load i32* %inc
>
>   %tmp15 = add i32 %tmp16, %tmp18
>
>   %tmp13 = icmp slt i32 %tmp14, %tmp15
>
>   br i1 %tmp13, label %then11, label %else12
>
>
>
> then11:
>
>   %tmp20 = load i32* %f
>
>   %tmp22 = alloca i32
>
>   store i32 1 , i32* %tmp22
>
>   %tmp23 = load i32* %tmp22
>
>   %tmp24 = load i32* %i
>
>   %tmp21 = add i32 %tmp24, %tmp23
>
>   store i32 %tmp21, i32* %i
>
>   %tmp19 = mul i32 %tmp20, %tmp21
>
>   store i32 %tmp19, i32* %f
>
>   br label %then4
>
>
>
> else12:
>
>   %tmp25 = load i32* %f
>
>   %tmp335 = getelementptr [4 x i8]* @.str1, i32 0, i32 0
>
>   %tmp336 = call i32 (i8*, ...)* @printf( i8* %tmp335, i32 %tmp25 )
>
>
>    ret i32 %tmp25
>
> }
>
>
> _______________________________________________
> LLVM Developers mailing list
> [hidden email]         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>

_______________________________________________
LLVM Developers mailing list
[hidden email]         http://llvm.cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev